x86 architecture
legacy floating-point registers




 
FP/MMX/3DNow! registers
 
7
9
7
8
  6
4
6
3
   
0
 
S
i
g
n
 
B
i
t
s
ST(0) Exponent ST(0) Significand or MM0
ST(1) Exponent ST(1) Significand or MM1
ST(2) Exponent ST(2) Significand or MM2
ST(3) Exponent ST(3) Significand or MM3
ST(4) Exponent ST(4) Significand or MM4
ST(5) Exponent ST(5) Significand or MM5
ST(6) Exponent ST(6) Significand or MM6
ST(7) Exponent ST(7) Significand or MM7

 
FP/MMX control registers
 
register 1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1  
0
 
CW (control word) 0 0 0 X RC PC 0 1 P
M
U
M
O
M
Z
M
D
M
I
M
SW (status word) B C
3
TOP C
2
C
1
C
0
E
S
S
F
P
E
U
E
O
E
Z
E
D
E
I
E
TW (tag word) TAG
7
TAG
6
TAG
5
TAG
4
TAG
3
TAG
2
TAG
1
TAG
0
FP
opcode bits
1101_1b OPC1
bits 2...0
OPC2
bits 7...0
  1
5
  0 6
3
  3
2
3
1
   
0
 
FP
instruction pointer
FP_CS reserved FP_IP
FP_IP64
FP
data pointer
FP_DS reserved FP_DP
FP_DP64



 
16-bit real mode format
 
offset  
16-bit protected mode format
 
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0 1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
CW +0000h CW
SW +0002h SW
TW +0004h TW
FP_IP.15...0 +0006h FP_IP
IP.19...16 0 FP_OPC +0008h FP_CS
FP_DP.15...0 +000Ah FP_DP
DP.19...16 0 0 0 0 0 0 0 0 0 0 0 0 +000Ch FP_DS

 
32-bit real mode format
 
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0 offset
reserved CW +0000h
reserved SW +0004h
reserved TW +0008h
reserved FP_IP.15...0 +000Ch
0 0 0 0 FP_IP.31...16 0 FP_OPC +0010h
reserved FP_DP.15...0 +0014h
0 0 0 0 FP_DP.31...16 0 0 0 0 0 0 0 0 0 0 0 0 +0018h

 
32-bit protected mode format
 
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0 offset
reserved CW +0000h
reserved SW +0004h
reserved TW +0008h
FP_IP +000Ch
0 0 0 0 0 FP_OPC FP_CS +0010h
FP_DP +0014h
reserved FP_DS +0018h



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