XMM and YMM
| traditional XMM and YMM registers |
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| 2 5 5 |
1 2 8 |
1 2 7 |
0 |
||
| preserved (legacy) or zero-extended (VEX) | XMM0 | ||||
| YMM0 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM1 | ||||
| YMM1 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM2 | ||||
| YMM2 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM3 | ||||
| YMM3 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM4 | ||||
| YMM4 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM5 | ||||
| YMM5 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM6 | ||||
| YMM6 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM7 | ||||
| YMM7 | |||||
| additional XMM and YMM registers |
|||||
| 2 5 5 |
1 2 8 |
1 2 7 |
0 |
||
| preserved (legacy) or zero-extended (VEX) | XMM8 | ||||
| YMM8 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM9 | ||||
| YMM9 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM10 | ||||
| YMM10 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM11 | ||||
| YMM11 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM12 | ||||
| YMM12 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM13 | ||||
| YMM13 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM14 | ||||
| YMM14 | |||||
| preserved (legacy) or zero-extended (VEX) | XMM15 | ||||
| YMM15 | |||||
| control/status register |
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| register | 3 1 |
3 0 |
2 9 |
2 8 |
2 7 |
2 6 |
2 5 |
2 4 |
2 3 |
2 2 |
2 1 |
2 0 |
1 9 |
1 8 |
1 7 |
1 6 |
1 5 |
1 4 |
1 3 |
1 2 |
1 1 |
1 0 |
9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| MXCSR | reserved | M M |
r. | F Z |
RC | P M |
U M |
O M |
Z M |
D M |
I M |
D A Z |
P E |
U E |
O E |
Z E |
D E |
I E |
||||||||||||||
note: DAZ was introduced with SSE2. Check MXCSR_MASK (below) for more details.
note: MM was introduced with MSSE. Check MXCSR_MASK (below) for more details.
| FXSAVE and FXRSTOR format |
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| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | offset |
| reserved | FP_CS | FP_IP | FP_OPC | res. | FEMPTY | SW | CW | +0000h | ||||||||
| FP_IP64 (if 64-bit operand size) | ||||||||||||||||
| MXCSR_MASK #1,#2 | MXCSR #1 | reserved | FP_DS | FP_DP | +0010h | |||||||||||
| FP_DP64 (if 64-bit operand size) | ||||||||||||||||
| reserved | ST(0) or MM0 | +0020h | ||||||||||||||
| reserved | ST(1) or MM1 | +0030h | ||||||||||||||
| reserved | ST(2) or MM2 | +0040h | ||||||||||||||
| reserved | ST(3) or MM3 | +0050h | ||||||||||||||
| reserved | ST(4) or MM4 | +0060h | ||||||||||||||
| reserved | ST(5) or MM5 | +0070h | ||||||||||||||
| reserved | ST(6) or MM6 | +0080h | ||||||||||||||
| reserved | ST(7) or MM7 | +0090h | ||||||||||||||
| XMM0 #1 | +00A0h | |||||||||||||||
| XMM1 #1 | +00B0h | |||||||||||||||
| XMM2 #1 | +00C0h | |||||||||||||||
| XMM3 #1 | +00D0h | |||||||||||||||
| XMM4 #1 | +00E0h | |||||||||||||||
| XMM5 #1 | +00F0h | |||||||||||||||
| XMM6 #1 | +0100h | |||||||||||||||
| XMM7 #1 | +0110h | |||||||||||||||
| XMM8 #1 | +0120h | |||||||||||||||
| XMM9 #1 | +0130h | |||||||||||||||
| XMM10 #1 | +0140h | |||||||||||||||
| XMM11 #1 | +0150h | |||||||||||||||
| XMM12 #1 | +0160h | |||||||||||||||
| XMM13 #1 | +0170h | |||||||||||||||
| XMM14 #1 | +0180h | |||||||||||||||
| XMM15 #1 | +0190h | |||||||||||||||
| reserved | +01A0h | |||||||||||||||
| reserved | +01B0h | |||||||||||||||
| reserved | +01C0h | |||||||||||||||
| reserved | +01D0h | |||||||||||||||
| reserved | +01E0h | |||||||||||||||
| reserved | +01F0h | |||||||||||||||
| note | description | |||||||||||||||
| #1 | Whether or not these fields are saved/restored while CR4.OSFXSR=0 is implementation-specific. The XMMn fields won't be saved/restored in CPL=0 PM64, if EFER.FFXSR is set to 1. | |||||||||||||||
| #2 | If this field is not written to by FXSAVE, then any MXCSR value that is to be loaded by FXRSTOR or LDMXCSR must be AND-masked with 0000_FFBFh first. Otherwise the value written by FXSAVE is to be used to AND-mask the MXCSR value before loading it with FXRSTOR or LDMXCSR. | |||||||||||||||
