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| Name: |
bob |
| eMail: |
vicecityent@hotmail.com |
| Date: |
March 16, 2004 at 19:54:08 |
| Subject: |
please email program to me . can anyone improve this program |
| Text: |
now encapsulate this procedure into a single assembly language instruction called bcp (block copy). Since this instruction is somewhat complex to do in hardware, it will be implemented with a microprogram. The format of the bcp instruction will be: bcp rs, rd, rt, where rs contains the address of the first word of the source to be copied, rd contains the address of the first word of the destination block and rt contains the number of words to be copied. Although this has the format of a register word, there will be extensive memory activity in copying the data. You may assume that the bcp instruction has already been fetched and decoded by a microprogram The fact that the two source registers from the register file must be first buffered in the A and B registers causes extra cycles to be needed for this instruction. You may make the following extensions to the microinstruction definition as given in fig C.20: Assume the data path is modified such that, for this instruction, the register file registers could bypass the A and B registers and directly act as a source to the ALU. This means that you could modify the SRC1 and SRC2 fields of the micro word (see fig C.20) to contain the explicit register designator such as rs, rd, rt, or even a direct reference such as $4 or $t. In addition, assume that SRC1 and SRC2 may be extended to included ƒ±smallƒ° 5 bit constants such as 4 to be used for incrementing or decrementing. Also you may extend the ƒ±Write ALUƒ° and ƒ±Write MDRƒ° values of the ƒ±Register controlƒ° field to be ƒ±Write ALU rgƒ° and ƒ±Write MDR rgƒ° respectively, where rg is any register file designation (see fig C.20). Previously ƒ±Write ALUƒ° and ƒ±Write MDRƒ° always defaulted to whatever the corresponding registers rd and rt referred to as a destination. Now you could explicitly specify it as rg. Similarly you may extend the same field name (Write ALU) in the ƒ±Memoryƒ° field (see fig C.20) to ƒ°Write ALU rgƒ°, where rg explicitly refers to any register in the register file rather than using only the B reg as a source of data to be written to memory.Finally you may extend the sequencing field to do conditional branching within the microprogram. Let these new microprogram conditional branches be based on a test for zero on the ALUOut register. Use the following notation: ƒ±if alu == 0 labelƒ° and ƒ±if alu != 0 labelƒ° where label is any microprogram label. Use the timing implied by the state diagram in fig. 5.42 as a model for the timing implied by your microprogram. Remember that in edge triggering methodology you can transfer the current contents of a state element through combinational logic to another state element in a single clock pulse (see fig. 5.2 and 5.3, pp. 342-343). You cannot transfer the new or potential state going into the first flip-flop, but only the current (old) state in this single clock pulse. Write the microprogram in a tabular form in the style of fig 5.46. Explain each microinstruction with a comment at the end of each row in the table. If a field in a microinstruction is a don¡¦t care or not asserted, put a dash in that field. I suggest that you lay out the table on a sheet in a horizontal or landscape orientation because the table is a bit wide with a normal orientation. Remember that going from the register file through the ALU and back to the register file or to memory takes a path through the ALUOut temporary register. Finally to make things consistent, if you need a temporary register, use $8 (same as $t0). To get started your table could perhaps begin as follow: Label ALUControl SRC1 SRC2 REGControl Memory PCWritectl Sequencing Comments BCP add rt 0 - - - if alu==0 done move count to ALUOut & branh on 0 move add rs 0 - - - seq set ALUOut with rs .data #data declaration section .align 4 intblock: .word 1, 2, 3, 4, 5 intblock2: .word 0, 0, 0, 0, 0 .text main: #start of code section #save registers addi $sp, $sp, -28 sw $14, 24($sp) sw $13, 20($sp) sw $9, 16($sp) sw $10, 12($sp) sw $11, 8($sp) sw $12, 4($sp) sw $ra, 0($sp) jal copy li $2, 10 #this and the next instruction gets us to exit the program syscall copy: #start of copy procedure la $9, intblock la $10, intblock2 add $11, $zero, $zero addi $11, $zero, 5 add $13, $zero, $zero add $14, $zero, $zero add $15, $zero, $zero loop: beq $11, $12, end add $14, $zero, $zero add $14, $12, $12 add $14, $14, $14 add $13, $9, $14 lw $15, 0($13) add $13, $zero, $zero add $13, $10, $14 sw $15, 0($13) #addi $9, $zero, 4 #addi $10, $zero, 4 addi $12, $12, 1 j loop end: #restore registers lw $ra, 0($sp) lw $12, 4($sp) lw $11, 8($sp) lw $10, 12($sp) lw $9, 16($sp) lw $13, 20($sp) lw $14, 24($sp) addi $sp, $sp, 28 jr $ra #return to calling routine |
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