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Name: Antoine Leca
Date: March 16, 2004 at 09:08:36
Subject: IA32e: JRCXZ?
Text: Use of 64-bit wide (i.e., normal, without address size prefix) jump
when GPR1 is zero.

According to AMD, assembly code should use JRCXZ

According to Intel, well, I cannot decide! 1.4.6 of #300834-001
(p. 30 or 1-14) seems to imply using JCXZ (and then how to force
test on only ECX, implying a 67h prefix?), while the description
of the instruction (p.323 or 2-269) says that JCXZ applies only
to 16-bit CX (not available in 64-bit mode), while JECXZ applies
to ECX, and no choice is open to apply to RCX.


On a related point, the description for LOOPcc is also conflicting.
1.4.6 says that operand size prefixes do not affect it, the way
it behaves with AMD. However, the decription of the instructions
(p. 350 or 2-296) explicitely cites combinations REX.W + Ex


Again, I am sorry if these points are well known and already corrected.

Antoine


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