Intel P6 Overdrive
| General Details | Name | Pentium II Overdrive | |
| Codename | POPD66X333 | ||
| Family/Generation | 80686, 6th Generation, MMX | ||
| Vendor | Intel | ||
| Manufacturer | Intel | ||
| First Introduction | Aug 10, 1998 (333 MHz) | ||
| Physical Details | Package Type |
387 Pin Module 528 Pin LGA (CPU) |
|
| Package Size | 8.18 cm x 6.25 cm x 3.67 cm (with Fan Heat Sink) | ||
| Socket or Slot | Socket 8 | ||
| Transistors | 7,500,000 (includes 2x 16 KB L1 Cache) | ||
| Process Technology | 5M, 0.25 µm, CMOS | ||
| Die Size | 131 mm² | ||
| Electrical Details | Split Voltage | Yes (automatically determined via VID Pins) | |
| Core Voltage | 2.0 V | ||
| L2 Voltage | 2.5 V | ||
| I/O Voltage | 3.3 V | ||
| Typical Power | ??? W (0.25 µm @ 333 MHz, 512 KB L2 Full Speed Cache) | ||
| Maximum Power | ??? W (0.25 µm @ 333 MHz, 512 KB L2 Full Speed Cache) | ||
| Cooling | Required, Fan Heat Sink is attached | ||
| Clock Frequencies | CPU Core Speed | 333 Mhz | |
| L1 Cache Speed | 1.0x Core Speed | ||
| L2 Cache Speed | 1.0x Core Speed | ||
| External Bus Speed |
66 MHz GTL+ up to 8 Outstanding Transactions |
||
| Core/Bus Ratio | 5.0x | ||
| Miscellaneous | usual Motherboard | Single or Dual Processor Socket 8 | |
| usual Chipset | Intel 82440FX, 82450KX, 82450GX | ||
| Pictures |
512 KB L2 Cache Die (C6C) (62 KB JPG) Overdrive Module with Heatsink and Fan (77 KB JPG) Overdrive Top (70 KB JPG) and Bottom (67 KB JPG) |
||
| Processor Core | Generic Details | RISC, Out-of-order and Speculative Execution | |
| Specific Details | 20 Entry RS, 40 Entry ROB | ||
| Registers | 32 Bit Integer, 80 Bit FP, 64 Bit MM, 40 Entry RAT | ||
| Pipeline Depth | 12 (In-order) plus 2 (Out-of-order) Stages | ||
| Instruction Decoder | 3x IA-32/Cycle, 6x (4+1+1) µOPs/Cycle | ||
| Execution Units | 2x ALU/MMX, Load, Store Address, Store Data, Pipelined FPU | ||
| Execution Speed | up to 5 µOPs/Cycle | ||
| Processor Buses | Address Bus Width | 36 Bit | |
| Data Bus Width | 64 Bit, separate 64 Bit Backside L2 Cache Bus | ||
| Physical Memory | 2^36 Bit = 64 GB | ||
| Virtual Memory | 2^32 Bit = 4 GB | ||
| Logical Memory | (8,190 + 8,192) x 4 GB = 65,528 GB (~64 TB) | ||
| Multiprocessing | SMP, 2 Processors, using integrated local APICs | ||
| Power Management | HLT, STPCLK, SMI/SMM | ||
| Processor Caches | Level 0 | N/A | |
| Level 1 | Code |
16 KB, 4-Way, 32 Byte/Line, SI, Fetch Port, Internal and External Snoop Port (for SMC/XMC), LRU |
|
| Data |
16 KB, 4-Way, 32 Byte/Line, MESI, Non-blocking, Dual-ported, Snoop Port, Write Allocate, 8 Banks, LRU |
||
| Level 2 | Unified |
512 KB, 4-Way, 32 Byte/Line, Non-blocking, 64 GB cacheable, 222 mm² (4M, 0.35 µm, CMOS), LGA, 5,000,000 Transistors |
|
| Processor Buffers | Read Buffer | 4x 32 Byte | |
| Write Buffer | 32 Byte | ||
| Prefetch Queue | 32 Byte | ||
| Branch Prediction | Static | Yes | |
| Dynamic |
512 Entries, 4-Way, providing 16x 4-State Pattern Recognition |
||
| RSB | 4 Entries | ||
| TLB | 4 KB Code | 32 Entries, 4-Way, LRU | |
| Large Code | 2 Entries, Full, LRU | ||
| 4 KB Data | 64 Entries, 4-Way, LRU | ||
| Large Data | 8 Entries, 4-Way, LRU | ||
| Instruction Set | Regular | IA-32 | |
| Floating Point | Integrated | ||
| Multi Media | MMX, FXSAVE/FXRSTOR | ||
| Processor Modes | Real, Protected, Virtual, Paging, SMM, Probe Mode | ||
